Data conversion system

ABSTRACT

An electronic system for converting an analog input signal into typical synchro or resolver-type signals. The input voltage is compared with function waveform such as a ramp voltage of a given frequency which is synchronized to the alternating current and power source. When the input voltage balances out the ramp voltage, a sampling pulse is generated. With this pulse, the instantaneous values of two-power frequency sine waves are measured and held in sample-and-hold circuits. The two-power frequency signals are phase-locked to the ramp voltage and can be derived from a biphase oscillator. Coupled to the sample-and-hold circuits are power frequency modulators and output amplifiers with active filters which provide a pair of synchro or resolvertype output signals. The ramp voltage generator and sine wave generator are commonly utilized in the case of a plurality of converter channels.

United States Patent [72] inventor J j n 3,555,261 1/1971 McClurg235/186 X B Primary Examiner-Maynard R. Wilbur PP- 23,633 AssistantExaminer-Charles D. Miller :"f t d m 's f Attorneys-Glenn Orlob, KennethW. Thomas and Conrad O.

3 en e G d [73] Assignee The Boeing Company at Seattle, Wash.

' ABSTRACT: An electronic system for converting an analog 1 input signalinto typical synchro or resolver-type signals. The input voltage iscompared with function waveform such as a [54] g g fi ramp voltage of agiven frequency which is synchronized to g g the alternating current andpower source. When the input [52] U.S.Cl 235/189, voltage b lan e outthe ramp voltage, a sampling pulse is 323/2l generated. With this pulse,the instantaneous values of two- [5 Int. power frequency sine waves aremeasured and in Sample- [50] Field of Sear h-m and-hold circuits. Thetwo-power frequency signals are phase- 3 3 150-53, I locked to the rampvoltage and can be derived from a biphase 136, 189; 340/347 oscillator.Coupled to the sample-and-hold circuits are power frequency modulatorsand output amplifiers with active filters [56] References cued whichprovide a pair of synchro or resolver-type output UNITED STATES PATENTSsignals. The ramp voltage generator and sine wave generator 3,384,7385/1968 Warrick, Jr 235/189 are commonly utilized in the case of aplurality of converter 3,478,198 11/1969 Lewis et al 235/l50.53 Xchannels.

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Electromechanical systems have previously been used to convert a DCvoltage into an AC synchro signal. Generally, a position servo receivesthe DC input signal and the output shaft of the servo is utilized todrive a synchro transmitter which performs the actual conversion fromshaft position to synchro signal. Through simple in principle, there areseveral serious disadvantages of such prior art conversion systems.Electromechanical conversion devices require a substantial amount ofspace and are of limited accuracy. Also, electromechanical devices nowused to convert a DC voltage to an AC signal are expensive due to thenature of such devices.

The present novel electronic converter in contrast requires littlespace, e.g. about 40 such converters occupy a 19-inch by 7-inch by15-inch box, whereas one servo converter of the prior art occupies avolume of about 6 inches by inches by l5 inches. Cost of the disclosedanalog-synchro converter is very substantially less since limited to thecost only of the circuit components. A limiting factor in the accuracyof the prior art servo converter is the feedback potentiometer, theoutput of which is compared with the incoming DC voltage. The linearityerror in the potentiometer may be in the order of 0.25 percent to 0.1percent of full travel, thus the larger the travel, the larger will bethe error measured in degrees. At turns of travel, there would be anerror of 3.6 even for a linearity error of 0.1 percent in thepotentiometer. In the presently disclosed electronic converter, theerrors are matched to be of the same order as a synchro or resolver,approximately 0.l. The advantages of the electronic converter over theelectromechanical converter of the prior art are thus made veryapparent.

While in certain instrumentation/computer complexes the interfaceproblem is solved by utilizing the DC voltages to directly driveD'Arsonval moving coil/permanent magnet instruments, but when it becomesnecessary to drive instruments having high torque and requiring largetravel, e.g., 270, a synchro repeater or a servo-driven instrument hasto be used. In such cases the present electronic analog-synchroconverter converts the computer output voltages into 400 Hz. signalswhich can be utilized to directly drive synchro repeaters or areacceptable as input signals to such servo-driven instruments which havesynchros or resolvers as feedback elements. Since the present electronicconverter cost per channel plus a synchro repeater is approximately thesame as the cost of a moving coil instrument with 270 movement, andsince it is much easier to adapt pointers which may have to be lighted,to a synchro shaft than to a sensitive moving coil instrument, thepresent converter plus synchro combination is an attractive substitutefor the present moving coil instrument.

It is accordingly an object of the present invention to provide improvedanalogto synchro-type signal conversion.

It is a further object of this invention to provide a multichannel dataconversion system providing two output voltages per channel andutilizing signal-generating means shared by a plurality of channels.

Other objects of this invention will become apparent from the followingdescription when taken in conjunction with the accompanying drawings inwhich:

FIG. I is a diagrammatic drawing in block and schematic formillustrating an electronic analog-synchro converter system in accordancewith one embodiment of the invention;

FIGS. 2a, 2b, 2c, 2d, 2:, 2f, 23, and 2h are graphs showing certainwaveforms useful in explaining the embodiment of FIG. 1;

FIG. 3 is a block diagram showing a system utilizing the electronicanalog-synchro converter shown in FIG., 1 for direct drive of a pointer;

FIG. 4 is a block diagram of a system utilizing theelectronicanalog-synchro converter of FIG. I, tofeeda synchro. controltransformer;

FIG. 5 is a block illustrating a multichannel function generation systemutilizing a plurality of electronic analog-synchro converters of thetype shown in FIG. 1; and

FIGS. 6a and 6b are detailed circuit diagrams of the electroniccircuitry of the embodiment of FIG. 1.

Referring to the drawings and more particularly to FIG. 1 thereof, thereis illustrated in block and schematic form an electronic analogtosynchro-type signal converter system 14 incorporating the features ofthis invention. As shown in FIG. I, the system 14 comprises a dataconversion system having two output voltages V, and V,. A multichanneldata conversion system is shown in FIG. 5 which incorporates a pluralityof channels of the type shown in FIG. I. V, is shown in FIG. 1 as theinput voltage to the channel, and V, and V, are shown as the outputvoltages of the single channel shown. The relationship between input andoutput can be written as:

where: V full input range of V volts 0 input bias constant D1 .2 aconstant angle rad V, output peak value, typical volts ll. 2 W=frequency of the reference power. rad/sec. f a function, e.g. a linearor a logarithmic function Where a channel is to-provide a signal to asynchro transformer or a synchro repeater, I shall be O(0and I shall be1r/6 (60) or, P, 60 and I I20. In the case where a resolver signal is tobe supplied, then b, 0 and b, 1r/2. The shaft position of the synchrothen becomes f (V,,,/V +a) expressed in radians. Characteristic of thesystem is that the argumentf V JV -l-a) is represented in the system asa time interval 'r between reference pulses shown in FIG. 2a andsampling pulses shown in FIG. 2b. The reference pulse has a repetitionfrequency equal to the power reference frequency waveshape shown in FIG.2c or the n subharmonic of the power reference frequency. The samplingpulse is generated by comparing the input voltage plus bias signal witha cyclic signal V, (waveshape shown in FIG. 2d). At the instant thecompared signals have the same value a step voltage occurs at the outputof the comparator 10 shown in FIG. 1. This output of the comparator 10is then coupled to the differentiator and pulse shaper 12 shown in FIG.1 where it is differentiated and amplified. The signal I, hasa fixedphase with respect to the reference pulse. The usefulinterval of V, iswhere its slope is greater than zero. The waveform of V is determiningthe function f. Where the waveform of V; is a ramp signal as shown inFIG. 2e, the function f will be linear. Where V, is an exponentialwaveform as shown in FIG. 2], a logarithmic function results, and a timesquare. waveform as shown in FIG. 2g will give a square rootrelationship between the time interval 1- and the input voltage V,,,. Alinear V, is quite useful and it should be noted that while the totaltravel in f (V,,,lV +n) can theoretically be any, as a practical matteran upper limit of about 40 revolutions is set. The sine waves U, and Ushown in FIG. 2h have the phase angles I and I referred to the referencepulse as can be seen by comparison with FIG. 2a.

The number of the. harmonic N determines the total angular travel of theargument f V J V +a). The sine waves U, and U, applied as inputs to thesystem 14 as shown in FIG. 1 can in the case wherethey have a frequencyof 400 Hz. be derived from a 400 Hz. power source, e.g. fromathree-phase source or from a biphase oscillator Synchronized to thereference By proper'mixing of in-phaseand quadrature voltages from theoscillator, I can be made 60. FIG. -I shows the arrangement in system 14of the sample and'hold-circuit 16a in'the phase I portion of system 14.Sample and hold circuit 16a includes electronic switching means 18a andholding capacitor C4. The output voltage V, from integrator means 20a isfed back and added to the sinusoidal voltage U adder means 220 in thephase 1 portion of system 14. Similarly, in the phase 2 portion ofsystem 14, the output voltage V, obtained from integrator means 20b isfed back and added to the sinusoidal voltage U by adder means 23b. Atthe time electronic switching means 18a in the phase 1 portion of system14 closes, the error voltage E,,=U,+V, is sampled and held. E equalszero in the steady state condition, and by substituting r for t in theequations for E shown in the legends in FIG. 1, the solution becomes:

The voltages V, and V,, developed in the phase 1 and phase 2 portions ofsystem 14 are then modulated by modulator means 22a and 22b,respectively, filtered and amplified by amplifier and filter means 24aand 24b, respectively, to provide the phase 1 and phase 2 outputvoltages V and V, at the desired level.

Turning now to FIG. 3 there is shown in block diagram form a systemutilizing the electronic analog-synchro converter system 14 of FIG. 1. Asynchro repeater 26 is shown directly driving an indicator meanscomprising a pointer 28 directly coupled to output shaft 29. This typeof indicator means is possible only where there is very low additionalmechanical load (friction) on the output shaft 29 because of the ratherlow torque per deviation ratio of synchro repeater 14.

Besides the use of analog-synchro converter system 14 to directly drivea synchro repeater 26 as shown in FIG. 3; by converting the outputvoltage or DC input from, e.g., a computer source into 400 Hz. signals Vand V the converter output signals V and V: are also acceptable and maybe utilized as input signals to servo-driven instruments which havesynchro control transformers or resolvers as feedback elements as shownin FIG. 4. In FIG. 4, the outputs from electronic analog-synchroconverter system 14 feed synchro control transformer 32 which isutilized as a feedback element in the servo loop. The electronicanalog-synchro converter system I4 permits the use of various types ofknown commercial instruments in a system of this type.

A multichannel data conversion system (40 channels) is shown in FIG.utilizing a single-biphase oscillator 34 for generating U, and U, and asingle function generator 36 which signals are shared by the convertersof all channels. The system of FIG. 5 can therefore be seen to beespecially advantageous if only a few types of functions have to be usedin a plurality of channels, i.e., two linear functions with differentranges and a logarithm function. In the analog to synchro converterchannel 1 of FIG. 5, the analog input voltage is compared in comparatorand pulse shaper 10, 12 with a ramp voltage V, generated by rampgenerator 36 (200 Hz.) which is synchronized to 400 Hz. power source 38.When analog input I balances out the ramp voltage, a sampling pulse isgenerated by comparator and pulse shaper l0, l2. Utilizing the samplingpulse, the instantaneous values of two 400 Hz. sine waves generated inbiphase oscillator 34 are measured and held in sample and hold circuits16a and 16b. The ramp voltage is phase locked to the two 400 Hz.signals. Subsequent to the sample and hold circuits 16a and 16b, furthersignal processing takes place respectively in the phase 1 and phase 2portions of the converter 14 of channel 1 in modulator output amplifiersand active filters 22a, 24a and 22b, 24b which follow. The commonutilization in a plurality of converter channels of the ramp voltagegenerator 36 and sine wave generator 34 reduces the size and cost ofmultichannel processing of data. If V, is an exponential waveforminstead of the ramp voltage, shown, the output shaft positions of thesynchros coupled to the various channel outputs would be logarithmfunctions of the analog input voltages. This feature would be usefulwhere a logarithmic scale is desired. By a combination of a ramp voltagegenerator 36 of a lower frequency, e.g., Hz. and sine waves from biphasegenerator 34 having a frequency of 2,400 Hz., it is possible to make thetotal range as high as 30 revolutions on the synchro shafts.

One converter channel 14 has been built in a small area of 5 inches by4% inches on a printed circuit board, thus occupying a minimum of spaceand cost compared to the aforementioned prior art-type electromechanicalconverters. Furthermore, in contrast to the electromechanical conversionof signals, the following calculated and measured performance data of anelectronic converter embodiment of the present invention will beappreciated by those skilled in the art:

Full input voltage range :10 v. or 1100 v.

Zero drift referred to the input :5 m.v. at 10 v.F.S.

Output voltages max volt. 1 L8 v., 400 Hz.

Nonlinearity, referred to an ideal synchro shaft position :1 m. radStability of the scaling from input voltage to shaft position 0.05percent Full output range referred to synchro shaft position rev. to 30rev.

Referring now to FIGS. 6A and 68 with FIG. 6A arranged at the top ofFIG. 63, there is illustrated a detailed circuit diagram of the presentelectronic converter of FIG. 1 giving exemplary values for the circuitelements shown.

In the comparator means 10 of FIG. 6A, the sweep voltage V, and theinput 1 voltage are added by means of resistors R2 and R3 and coupled toinput terminal 2 of amplifier ll. An input 2 voltage may be applied tothe terminal so captioned where a different scaling is desired or if ananalog summing of two signals is needed and in such cases a resistor Ris connected in series with input 2 terminal where R is selected in thekilohm range for desired scaling. When zero crossing occurs, theamplifier Il makes a step in the output voltage which appears at pin 6of I1. The diodes D1 and D2 prevent large signals from saturating theamplifier. Resistor R1 in series with resistor R2 is needed to balancethe amplifier so that with zero input on the input terminal ofcomparator l0 and with proper sweep input, the sampling pulse will occurwhen the U signal crosses zero ('1 =0). Variable resistor R1 provides again adjustment, and is used to set the scale factor on the input signalapplied to the input terminal of comparator 10 to 20lvolt. Resistors R9and R10 in series with II and the 16 volt power source and shuntcapacitors C2 and C3 to reference potential comprise the decouplingnetworks for preventing interaction between different converter channelswhen a plurality of channels 14 are used in a system, e.g., as shown inFIG. 5.

In the differentiator and pulse shaper means 12, the output step fromamplifier I1 is differentiated in the capacitance resistance networkcomprising capacitor C 1 and resistor R14 series connected betweenoutput terminal 6 of amplifier II and the input terminal comprising thebase of transistor Q1, and resistor R13 connected between capacitor C1and resistor R14 and reference potential as shown. The negative goingpulse is the one which is utilized, and this negative going pulse islevel shifted and shaped in the transistor 01 as shown in the waveshapeson the leads of differentiator and pulse shaper 12 of FIG. 6A of thedrawings. The resistor R15 coupled between the base of transistor Q1 andthe positive 16 volt source provides a slight positive off" biasing oftransistor 01 which results in fast fall and rise times of the shapedsampling pulse at the output collector electrode of transistor 01. Thefollowing circuit description applies to both the phase 1 portion of thecircuit of FIG. 6A and the phase 2 portion of the circuit of FIG. 65having correspondingly similar circuitry although reference will be madeto the phase I portion of FIG. 6A to avoid duplicate description ofcircuits. It should be noted in this connection that the sampling pulsefrom the collector of differentiator and pulse shaper 12 in the phase 1(FIG. 6A)

portion of the system is transmitted by way of resistor R12 to gateelectrode 3 of switching transistor Q2 while the sampling pulse islikewise transmitted via lead 1 in the phase 2 (FIG. 6B) portion of thesystem through corresponding resistor R46 to the gate electrode ofswitching transistor Q10. Electronic switching means 18a utilizes anN-channel field effect transistor Q2 of type 2N4220. One side of theswitch 02 is connected to the junction of resistors R16 and R17, theother end of resistor R16 being coupled to a sine wave U while the otherend of resistor R17 is coupled to the output terminal 6 operationalamplifier 12 of integrator 20a. The junction of resistor R16 and R17which is coupled to one side of switch 02 is the point at which theerror voltage in the sampling loop is generated. This voltage isnormally zero or very close to zero. When the sampling pulse goes fromv. to zero on the collector of transistor 01, switch comprisingtransistor Q2 will close thereby conducting between terminals 1 and 2thereof, and the error voltage will charge the holding capacitor C4which is coupled between the other side of switching transistor Q2 atterminal 1 thereof and reference potential. It should be noted thatswitching transistor Q performs a corresponding function in the FIG. 6Bphase 2 portion of the converter 14, viz, a sine wave U,but of differentphase is coupled to one side of switching transistor Q10 by way ofresistor R43.

Proceeding now in the FIG. 6A phase 1 portion of the converter 14 to theisolation stage 19A which includes transistor Q3, it should be notedthat transistor Q3 works in a source follower connection. The gatesource voltage thereof is compensated by the voltage drop acrossresistor R18 and part of variable resistor R19. Gate electrode 3 oftransistor Q3 in isolation stage 19a is connected to holding capacitorC4 and electrode 1 of switching transistor Q2. Transistor Q3 andresistors R18, R19, and R20 are matched for providing low temperaturedrift. Integrator means 20a comprises operational amplifier I2 which maybe a Fairchild type uA471c or equivalent. The first input terminal 2 ofoperational amplifier 12 is coupled to transistor Q3 by means of thevariable tap on various resistor R19 via resistor R21. Input terminal 2is coupled by means of capacitor C5 to the output terminal 6 ofoperational amplifier 12. The other input terminal 3 of operationalamplifier I2 in the integrator means 20a is coupled through the parallelR-C network comprising resistor R22 and capacitor C6 to referencepotential. The integrator output balances out the first sinusoidalsignal U, at the time of the generated sampling pulse.

The output from integrator 20a is modulated by a 400 Hz. square wavesignal in a seriesshunt-type FET chopper circuit in 400 Hz. modulatormeans 220. The gate electrode of transistor O4 is coupled by means ofthe parallel resistor diode combination of D3 and R23 to outputelectrode 6 of opera-- tional amplifier I2 with the diode D3 preventingthe gate from going positive with respect to the source which is tied tothe output terminal 6 of operational amplifier I2. The 400 Hz. squarewave power frequency generator is coupled by lead 3 through capacitor C7to the gate of transistor 04. Transistor O4 is off when transistor O5 ison and vice versa, which control is effected by the aforementionedsquare wave reference generator which is utilized in common bytransistors Q4 and 05, the gate of transistor Q5 being connected by lead2 to the 400 Hz. square wave generator. The power frequency generatorconnected to leads 2 and 3 provides a first signal at lead 2 which isgoing between -l6 volts and 0 volts, and a second signal at lead 3 whichis going between +7.5 volts and 7.5 volts and having the opposite phaseas the first signal. The gate voltage of transistor Q4 follows theoutput voltage from operational amplifier l2 during the positivehalf-period of the second signal which causes transistor O4 to conductduring this time interval.

Turning now to FIG. 6B and a description of the phase 2 400 Hz. outputamplifier which follows, it will be recognized that the square wavevoltage from the preceding 400 Hz. modulator 22b contains a DC componentas well as the familiar 3rd, 5th, and 7th, etc., han'nonics of 400 Hz.all of function of the complete circuit is:

Kw= A in i 2 2 (i 250 W0 W0 High Low Pass Pass Filter Filter W, isadjusted with 565E585 cofitro rpotentiometer R58 to approximately 400Hz., L is the damping factor, and is chosen to be 0.25. The filterattenuatesthe third harmonic down to 2 percent, and the fifth harmonicdown to 0.4 percent. The total gains equals A/2; and is adjusted withpotentiometer R53. The 400 Hz. output amplifier comprises couplingcapacitor C18 coupled at one end to receive the 400 Hz. modulator outputfrom the connected output electrodes of transistors Q12 and Q13, theother end of coupling capacitor C18 being connected to resistor R52 atone end of the series combination of resistor R52, gain adjustmentvariable resistor R53 and resistor R54, with the other end of the seriescombination including a direct connection from the resistor R54 to theinput 2 of operational amplifier I5 and feedback network b, feedbacknetwork 80b which includes phase adjustment means comprising variableresistor R58 being coupled between input terminal 2 of operationalamplifier I5 and the phase 2 output terminal of the power amplifier. Thepower amplifier has a voltage gain of only 1.3 times; however, the poweroutput is the important factor. The power amplifier comprises inputtransistors Q14 and Q15 having the bases thereof directly connected tooutput terminal 6 of operational amplifier 15. Output transistors Q16and Q17 are connected as grounded emitter stages with feedback providedas shown to the emitters of the input transistors in the mannerunderstood by those skilled in the art.

An error circuit indicator means 82 is provided for the presentelectronic analog-synchro converter system to indicate malfunction ofthe system or of the synchro connected to to it. This is accomplished bymonitoring the +18 v. supply current which increases if failures occur.When the voltage drops across the resistor R67 and the threshold levelof 0.6 v. is reached, transistor Q18 starts to conduct and a signal lampcoupled between the collector of transistor Q18 and ground will lightup. This error indicator circuit is of special importance when a synchroreceiver is connected to the output of the converter. The indicator notonly gives visible error signal indication for misalignment andcomponent failures but also indicates for failures such as faultyconnections to the synchro and undesirably high-friction level, stickingneedles,

etc.

Since numerous changes may be made in the above system and circuits anddifferent embodiments may be made without departing from the spirit andscope thereof, it is intended that all matter contained in the foregoingdescription or shown in the accompanying drawings shall be interpretedas illustrative and not in a limiting sense.

I claim:

1. An analog to synchro signal converter comprising;

means for comparing said analog signal and a reference signal togenerate a sampling pulse;

a first sample-hold circuit responsive to said sampling pulse forsampling a first sine wave of a predetermined frequency and holding saidsampled signal in the interval between samplings to produce a firstsample-hold output signal;

a second sample-hold circuit responsive to said sampling pulse forsampling a second sine wave of said predetermined frequency and out ofphase with said first sine wave and holding said sampled signal in theinterval between samplings;

first modular circuit means;

first integrator circuit means for receiving the sample-hold outputsignal from said first sample-hold circuit, said first integratorcircuit means interposed between said first sample-hold circuit and saidfirst modulator circuit means;

a first feedback path coupled between the output of said firstintegrator circuit and the input of said first samplehold circuit;

second modulator circuit means;

second integrator circuit means for receiving the samplehold outputsignal from said second sample-hold circuit, said second integratorcircuit means interposed between said second sample-hold circuit andsaid second modulator circuit means;

a second feedback path coupled between the output of said secondintegrator circuit and the input of said second sample-hold circuit;

first amplifier and filter means coupled to the output of said firstintegrator circuit and providing a first converter output signal; and

second amplifier and filter means coupled to the output of said secondintegrator circuit and providing a second con verter output signal.

2. The converter according to claim 1 wherein said means for comparingsaid analog signal and a reference signal to generate a sampling pulsecomprises comparator means for providing a step voltage when saidcompared signals are of the same value.

3. The converter according to claim 2 further comprising differentiatorand pulse shaper means coupled to said comparator means for providingsaid sampling pulse.

4. The converter according to claim 1 wherein said reference signalcomprises an exponential waveform.

5. The converter according to claim 1 wherein said reference signalcomprises a linear waveform.

6. The converter according to claim 1 wherein said reference signal hasa repetition frequency equal to said predetermined frequency or asubharmonic of said predetermined frequency.

7. A system for converting a plurality of analog-type signals into aplurality of pairs of synchro-type signals comprising in combination:

means for generating a reference signal;

means for generating a first sine wave voltage of a predeterminedfrequency and phase and a second sine wave voltage of said predeterminedfrequency and out of phase with said first sine wave voltage;

first comparator and pulse shaper means for comparing a first of saidplurality of analog-type signals with said reference signal to generatea first sampling pulse;

first sample and hold circuit means responsive to said first samplingpulse and said first sine wave voltage;

second sample and hold circuit means responsive to said first samplingpulse and said second sine wave voltage; first modulator, amplifier, andfilter means coupled to said first sample and hold circuit means toprovide one of a first pair of said plurality of pairs of synchro-typesignals; second modulator, amplifier, and filter means coupled to saidsecond sample and hold circuit means to provide the other of said firstpair of synchro-type signals;

a second comparator and pulse shaper means for comparing a second ofsaid plurality of analog-type signals with said reference signal togenerate a second sampling pulse; third sample and hold circuit meansresponsive to said second sampling pulse and said first sine wavevoltage; fourth sample and hold circuit means responsive to said secondsampling pulse and said second sine wave voltage; third modulator,amplifier, and filter means coupled to sald third sample and holdcircuit means to provide one of a second pair of said plurality of pairsof synchro-type signals; and

fourth modulator, amplifier, and filter means coupled to said fourthsample and hold circuit means to provide the other of said second pairof said plurality of pairs of synchro-type signals.

8. The system according to claim 7 wherein said means for generatingsaid first and second sine wave voltages comprises biphase oscillatormeans.

9. The system according to claim 7 wherein said reference signal has arepetition frequency equal to said predetennined frequency of asubharmonic of said predetermined frequency.

1. An analog to synchro signal converter comprising: means for comparingsaid analog signal and a reference signal to generate a sampling pulse;a first sample-hold circuit responsive to said sampling pulse forsampling a first sine wave of a predetermined frequency and holding saidsampled signal in the interval between samplings to produce a firstsample-hold output signal; a second sample-hold cIrcuit responsive tosaid sampling pulse for sampling a second sine wave of saidpredetermined frequency and out of phase with said first sine wave andholding said sampled signal in the interval between samplings; firstmodular circuit means; first integrator circuit means for receiving thesample-hold output signal from said first sample-hold circuit, saidfirst integrator circuit means interposed between said first sampleholdcircuit and said first modulator circuit means; a first feedback pathcoupled between the output of said first integrator circuit and theinput of said first sample-hold circuit; second modulator circuit means;second integrator circuit means for receiving the sample-hold outputsignal from said second sample-hold circuit, said second integratorcircuit means interposed between said second samplehold circuit and saidsecond modulator circuit means; a second feedback path coupled betweenthe output of said second integrator circuit and the input of saidsecond sample-hold circuit; first amplifier and filter means coupled tothe output of said first integrator circuit and providing a firstconverter output signal; and second amplifier and filter means coupledto the output of said second integrator circuit and providing a secondconverter output signal.
 2. The converter according to claim 1 whereinsaid means for comparing said analog signal and a reference signal togenerate a sampling pulse comprises comparator means for providing astep voltage when said compared signals are of the same value.
 3. Theconverter according to claim 2 further comprising differentiator andpulse shaper means coupled to said comparator means for providing saidsampling pulse.
 4. The converter according to claim 1 wherein saidreference signal comprises an exponential waveform.
 5. The converteraccording to claim 1 wherein said reference signal comprises a linearwaveform.
 6. The converter according to claim 1 wherein said referencesignal has a repetition frequency equal to said predetermined frequencyor a subharmonic of said predetermined frequency.
 7. A system forconverting a plurality of analog-type signals into a plurality of pairsof synchro-type signals comprising in combination: means for generatinga reference signal; means for generating a first sine wave voltage of apredetermined frequency and phase and a second sine wave voltage of saidpredetermined frequency and out of phase with said first sine wavevoltage; first comparator and pulse shaper means for comparing a firstof said plurality of analog-type signals with said reference signal togenerate a first sampling pulse; first sample and hold circuit meansresponsive to said first sampling pulse and said first sine wavevoltage; second sample and hold circuit means responsive to said firstsampling pulse and said second sine wave voltage; first modulator,amplifier, and filter means coupled to said first sample and holdcircuit means to provide one of a first pair of said plurality of pairsof synchro-type signals; second modulator, amplifier, and filter meanscoupled to said second sample and hold circuit means to provide theother of said first pair of synchro-type signals; a second comparatorand pulse shaper means for comparing a second of said plurality ofanalog-type signals with said reference signal to generate a secondsampling pulse; third sample and hold circuit means responsive to saidsecond sampling pulse and said first sine wave voltage; fourth sampleand hold circuit means responsive to said second sampling pulse and saidsecond sine wave voltage; third modulator, amplifier, and filter meanscoupled to said third sample and hold circuit means to provide one of asecond pair of said plurality of pairs of synchro-type signals; andfourth modulator, amplifier, and filter means coupled to said fourthsample and hold circuit means to provide the other of said seCond pairof said plurality of pairs of synchro-type signals.
 8. The systemaccording to claim 7 wherein said means for generating said first andsecond sine wave voltages comprises biphase oscillator means.
 9. Thesystem according to claim 7 wherein said reference signal has arepetition frequency equal to said predetermined frequency of asubharmonic of said predetermined frequency.